Metal silicides are often formed on semiconductor substrate doped regions, polysilicon members, and metal members within semiconductor devices to reduce contact resistance. More common silicides used in the semiconductor industry include titanium silicide (TiSi.sub.2), molybdenum silicide (MoSi.sub.2) and cobalt silicide (CoSi.sub.2). Of these silicides, cobalt silicide is preferred from the perspective that it has the least resistance of any of the other silicides. However, titanium silicide is more prevalent in devices because it is easier to manufacture in view of current problems with cobalt silicide formation processes.
There are two primary known methods of forming cobalt silicide. In one process, a layer of cobalt is sputtered deposited onto a semiconductor substrate having exposed silicon and/or polysilicon regions. The cobalt layer is then annealed at a low temperature to form Co.sub.2 Si and CoSi where the cobalt layer is in intimate contact with the silicon or polysilicon regions. In this anneal process, only the portion of the cobalt layer in contact with the exposed silicon or polysilicon regions will be reacted, thus the silicidation is selective. After forming Co.sub.2 Si and CoSi, unreacted portions of the cobalt layer are selectively removed, leaving only that portion of the layer which has undergone silicidation. Selective removal of the unreacted cobalt layer is most often accomplished by using a solution of phosphoric, nitric, acetic and sulfuric acids. After removing unreacted portions of the cobalt layer the substrate is further annealed at a higher temperature to transform the Co.sub.2 Si and CoSi compounds into CoSi.sub.2. CoSi.sub.2 has a lower resistivity than Co.sub.2 Si and CoSi formed in the initial anneal step, and thus is preferred. While this silicidation process has the advantage of forming self-aligned cobalt silicide regions, other drawbacks to the process make it undesirable. One problem is the ability to control the initial anneal step used to form Co.sub.2 Si and CoSi. The anneal must be done at controlled, low temperatures, for example 400.degree.-500.degree. C., in order to prevent silicidation of the cobalt layer in regions which are not in intimate contact with silicon. For example, in simultaneously forming silicide regions on a gate electrode and source and drain regions of a metal oxide semiconductor field effect transistor (MOSFET), wherein the source and drain are only separated from the gate by a small sidewall spacer, there is a risk that a portion of the blanket cobalt layer overlying the sidewall spacer would itself form a silicide region, thereby bridging the source and drain regions to the gate electrode and electrically short circuiting the device. To prevent this bridging, the temperature of the initial anneal step must be well controlled and kept low. With the emergence of rapid thermal processing techniques, such a tightly controlled process has become difficult to achieve. Another problem is the ability to physically deposit a thin enough cobalt layer which is continuous and uniform across the entire device. Due to the high rate of consumption of silicon during the silicidation anneals (3.6 .ANG. of silicon being consumed for every angstrom of cobalt), the cobalt layer must be kept thin (about 100 .ANG.) to avoid too much consumption of the underlying silicon. Yet in depositing such thin layer using sputter deposition, there is a risk of forming discontinuous films. Yet another problem is that sputter deposition processes are inherently dirty and can lead to contamination of any silicide regions formed.
Another known process for forming cobalt silicide regions is a process involving chemical vapor deposition (CVD), and is described in U.S. Pat. No. 4,814,294. In the CVD process, a cobalt precursor (for example a cobalt carbonyl) and a silicon precursor (for example a silane) are introduced into a reaction chamber in a precisely controlled ratio to react and deposit a cobalt silicide layer onto a heated substrate within the reaction chamber. While the CVD process overcomes many of the problems associated with the sputter deposition process, it suffers from a different problem. More specifically, the CVD process is not selective. The reaction which takes place in the CVD chamber results in a blanket layer of cobalt silicide deposited across the entire substrate. Accordingly, it is necessary to remove portions of the deposited cobalt silicide film which are unwanted. An etch thus has to be developed to be able to remove the cobalt silicide selectively to underlying layers of the device, and etch undesirably adds another processing step to device fabrication. Suitable dry etches to remove cobalt without removing cobalt silicide have yet to be developed. While cobalt can be etched selectively to cobalt silicide by HF solutions, concentrated HCl solutions, and concentrated aqueous alkali solutions, these etches attack cobalt very slowly. Furthermore, the need for an etch process undesirably increases the time required and costs imposed for manufacturing.
Therefore, it appears that a need exists for an improved cobalt silicide formation process which results in selective formation of cobalt silicide to remove the need for subsequent etching, which can be performed independent of the inherent problems with sputter deposition and rapid thermal processing equipment, and which results in uniform and controlled silicide region thicknesses across the device.